Cascaded op-amp stages and saturation of final stage

[jSwathi]

<Moderator's note: Thread split from another thread as the posts essentially comprise a new question about a new circuit. The problem statement has been formed by combining two of the moved posts. Poster has been notified to create a new thread for a new question>

1. Homework Statement I am using three-stage cascading amplifier, I used resistors of 10K and 300K with the input voltage of 1V. My aim is to get 30 for each stage and calculated bandwidth is around 33.33KHz. Now, when I am simulating at the end of the third amplifier I am getting the output of 15V which I measured in voltmeter. Is this the right method or should I need capacitors in this? Help me out
I have attached my file below

I have a question, Output coming from two stages would saturate the third op-amp or it produces the output

 

[CWatters]

It depends on the properties of the op-amp and the power supply. Some op-amps will only swing to within 3V of the supply rails. The calculated output is -24V so it might saturate if the power supply is less than about +/- 27V.

Edit: This post refers to the circuit in the original thread which also contained three op-amps. I can't see the new circuit in this thread clearly enough to comment. eg It might saturate for other reasons.

 

[CWatters]

I have attached my file below

Please can you post a clearer image.

 

[CWatters]

I am using three-stage cascading amplifier, I used resistors of 10K and 300K with the input voltage of 1V. My aim is to get 30 for each stage

All three stages have a gain of 30? There are several problems with that...

First problem is that 1V*30*30*30 = 27,000V so the output will saturate unless the power supplies are >27,000V !

You may also need to read up on DC Offset. Op-amps are not ideal. They can produce a small DC output voltage even with zero input. This can matter at very high gain because it's also amplified by the next stage. Typically a high pass filter capacitor is needed between each stage to block the DC offset but allow the wanted signal through.

PS: Is your input really 1V? Why do you wish to amplify it?

 

[jSwathi]

Thanks for the help, I am using small voltages to the amplifier so that it can amplify the voltages better. If I reduce the voltage, I cannot get the desired gain.
PS: What should be my voltage to get the desired gain? What specification of high pass filter capacitor should I use in my circuit?

 

[jSwathi]

I am uploading my design here

 

[CWatters]

Thanks for the help, I am using small voltages to the amplifier so that it can amplify the voltages better. If I reduce the voltage, I cannot get the desired gain.
PS: What should be my voltage to get the desired gain?

How did you calculate the desired gain? What is your desired input and output voltage?

Normally you know the input voltage (example 1V) and the desired Output voltage (example 10V) so the desired gain is calculated ... 10V/1V = 10.

What specification of high pass filter capacitor should I use in my circuit?

See figure 2. At this link. You need other changes as well.

http://www.analog.com/en/analog-dia...oblems-when-designing-amplifier-circuits.html

The value of the capacitor depends on the lowest frequency that you must pass.

 

[jSwathi]

My desired gain is 86dB which is calculated from the input and output. My input is 1V and output 30V (calculated according to resistors used) at each stage.The three stages gain is converted into dB. I will go through the link and modify the circuit. Are there any further changes in my design to get the desired gain?

 

[CWatters]

1V * 30 * 30 * 30 = 27,000 V

Do you want the output to be 27,000V? You cannot do that with op-amp.

 

[jSwathi]

Can I reduce my voltage gain to 15 volts by giving supply voltage of 0.5 volts?Is this possible?

 

[CWatters]

Can I reduce my voltage gain to 15 volts by giving supply voltage of 0.5 volts?Is this possible?

Do you mean change the input voltage from 1V to 0.5V?

0.5 * 30 * 30 * 30 = 13500 V

That is still impossible just using op-amps.

 

[CWatters]

I am uploading my design here

Check the first stage is correct. It looks different to the 2nd and 3rd Stage.

 

[CWatters]

Here is a data sheet for the TL081...

http://www.ti.com/lit/ds/symlink/tl081.pdf

The recommended power supply voltage VCC is +/- 15V (see section 6.3).

However the output will not swing +/- 15V. The maximum output swing V_OM is +/- 12V (see V_OM in the table in section 6.3)

This means the output of your circuit must not go more than +/- 12V. If it goes >12V the output will saturate.

Your circuit has a gain of about 27,000. This means your input signal must not be more than 12/27000 = 0.44mV. I would try an input of 0.10mV not 1V.

 

[CWatters]

Is this design a project for school? Can you post the exact question?

 

[jSwathi]

Do you mean change the input voltage from 1V to 0.5V?

0.5 * 30 * 30 * 30 = 13500 V

That is still impossible just using op-amps.

No, I mean 0.5*15*15*15=1687.5V. Is this possible?

 

[jSwathi]

Check the first stage is correct. It looks different to the 2nd and 3rd Stage.

In my design, I do not want use capacitor in the first stage.

 

[jSwathi]

Here is a data sheet for the TL081...

http://www.ti.com/lit/ds/symlink/tl081.pdf

The recommended power supply voltage VCC is +/- 15V (see section 6.3).

However, the output will not swing +/- 15V. The maximum output swing V_OM is +/- 12V (see V_OM in the table in section 6.3)

This means the output of your circuit must not go more than +/- 12V. If it goes >12V the output will saturate.

Your circuit has a gain of about 27,000. This means your input signal must not be more than 12/27000 = 0.44mV. I would try an input of 0.10mV, not 1V.

Here is a data sheet for the TL081...

I am using Op-amp07. I will use voltage of 12V. The input of 0.2 V. Will I acquire desired gain?

 

[jSwathi]

Is this design a project for school? Can you post the exact question?[/Q
This is my project. The actual question is I should be using cascading amplifiers using op-amps. At each stage, I should get the gain of certain gain. If I need more gain I should cascade and get more gain. I can use op-amps (Op07). I can follow any method to solve this. According to that, I have chosen the gain and voltages. I am going in the right path or not?

 

[CWatters]

No this is not the right path. The correct design procedure is...

1) Decide the input voltage
2) Decide the output voltage
3) Calculate the total gain required = Output Voltage/Input voltage.
4) Calculate the gain required for each stage.

Example:

I have a sensor producing 0-10mV that I want to amplify to 0-5V

1) Input voltage: 10mV
2) Output voltage: 5V
3) Total gain required: 5/(10 * 10^-3) = 500.
4) This requires 2 stages each with a gain of 22.36

Check... 10mV * 22.36 * 22.36 = 5V

If the output is 5V the power supply (Vcc) must be >8V (5V plus about 3V). A power supply of +/- 12V is ok.

 

[jSwathi]

No this is not the right path. The correct design procedure is...

1) Decide the input voltage
2) Decide the output voltage
3) Calculate the total gain required = Output Voltage/Input voltage.
4) Calculate the gain required for each stage.

Example:

I have a sensor producing 0-10mV that I want to amplify to 0-5V

1) Input voltage: 10mV
2) Output voltage: 5V
3) Total gain required: 5/(10 * 10^-3) = 500.
4) This requires 2 stages each with a gain of 22.36

Check... 10mV * 22.36 * 22.36 = 5V

If the output is 5V the power supply (Vcc) must be >8V (5V plus about 3V). A power supply of +/- 12V is ok.

Tq
1) Input voltage: 0.1mV
2) Output voltage: 2.7V
3)Total gain required:2.7/(0.1*10^-3)=27000
4) I am using three stages each of gain of 30
Is this requirement ok for the design should I improve it?

 

[jSwathi]

Here I am uploading my design with all the changes you suggested. Let me know if there are further changes in my design.
I am very thankful for the support you provided.

 

[jSwathi]

I am facing difficulty with the simulation for the requirement mentioned below. Should I use a capacitor with a small range at each stage? An input of 0.1mV would support the resistor of 10K. Help me out?
1) Input voltage: 0.1mV
2) Output voltage: 2.7V
3)Total gain required:2.7/(0.1*10^-3)=27000
4) I am using three stages each of gain of 30

 

[CWatters]

You circuit isn't correct. Check again figure 2 at the link I posted in #7. The left end of R1, R3 and R5 should be connected to 0V. Not connected to the previous stage.

 

[CWatters]

You will also need to make the input (V1) an AC source. Must it be DC?

 

[jSwathi]

You will also need to make the input (V1) an AC source.

But, I simulated in Proteus. At the third stage, it's taking more voltage up to 230V. I am uploading the circuit with all the improvements made. please check.

 

[CWatters]

Can you post a better image? I cannot read the circuit values or pin numbers.

Can you zoom in and make two screen shots (left and right)?

 

[jSwathi]

Can you post a better image? I cannot read the circuit values or pin numbers.

Can you zoom in and make two screenshots (left and right)?

OK, I have done two parts and I am uploading. Please refer the third stage, where it's taking 230V and displaying 228V. Here, the question is op-amp taking 230V and displaying the output. Does it make sense?

 

[CWatters]

OK, I have done two parts and I am uploading. Please refer the third stage, where it's taking 230V and displaying 228V. Here, the question is op-amp taking 230V and displaying the output. Does it make sense?

You also wrote...

1) Input voltage: 0.1mV
2) Output voltage: 2.7V
3)Total gain required:2.7/(0.1*10^-3)=27000
4) I am using three stages each of gain of 30

The input V1 on your circuit is 10mV not 0.1mV

10mV * 27000 = 270V The power supply is 230V so the output of stage 3 will saturate at about 230V.

This circuit would not work if you built it. The maximum power supply voltage for the OP07 is +/- 18V. If you used 230V it will fail. It would also be dangerous.

 

[CWatters]

I do not understand why you have these two capacitors...

 

[CWatters]

Here is my version of the circuit. My version amplifies AC only. If your source V1 is DC you need a different circuit.

I have not shown the power supply.

1) Input voltage: 0.1mV AC
2) Output voltage: 2.7V AC
3)Total gain required:2.7/(0.1*10^-3)=27000
4) I am using three stages each of gain of 30

The gain of the first stage is set by R2 and R1. Stage 2 and 3 are the same.

Capacitor C1 and R3 form a "high pass" circuit. This has a "cut-off frequency" of about 160Hz. Same for C2,R6 and C3,R9. This blocks any DC offset.

If you need a different cut-off frequency you can change C1, C2 and C3.

See also http://sim.okawa-denshi.jp/en/CRtool.php

Here is the output from the simulator. It is the frequency response for the output of stage 3 (Net1008)..

The output (above the cut off frequency) is 2.9V

 

[jSwathi]

I do not understand why you have these two capacitors...

View attachment 222587

I used these capacitors to reduce the DC offset voltage.

 

[jSwathi]

Here is my version of the circuit. My version amplifies AC only. If your source V1 is DC you need a different circuit.

I have not shown the power supply.

1) Input voltage: 0.1mV AC
2) Output voltage: 2.7V AC
3)Total gain required:2.7/(0.1*10^-3)=27000
4) I am using three stages each of gain of 30

View attachment 222592

The gain of the first stage is set by R2 and R1. Stage 2 and 3 are the same.

Capacitor C1 and R3 form a "high pass" circuit. This has a "cut-off frequency" of about 160Hz. Same for C2, R6, and C3, R9. This blocks any DC offset.

If you need a different cut-off frequency you can change C1, C2, and C3.

See also http://sim.okawa-denshi.jp/en/CRtool.php

Here is the output from the simulator. It is the frequency response for the output of stage 3 (Net1008).

View attachment 222595

The output (above the cut off frequency) is 2.9V

Tq, for the work done. Cant, we use DC input voltage and get the voltage, since while doing practically we prefer DC voltage to AC voltage. Can Even we use 10mV of input to draw the gain? Give me a solution.

 

[CWatters]

Tq, for the work done. Cant, we use DC input voltage and get the voltage, since while doing practically we prefer DC voltage to AC voltage. Can Even we use 10mV of input to draw the gain? Give me a solution.

If the source is DC you must make these changes to my circuit.

1) replace the capacitors with a wire link.

2) add a variable resistor to each op-amp to remove the DC offset voltage. See the date sheet for how to do this. The offset voltage for the OP07 can be 75uV so if you do not do this the output could be 2V even with 0V input. 75uV * 27000=2V.

You cannot have an input of 10mV and a gain of 27000 because the output voltage would be 10mV * 27000=270v. This is too high. If the input must be 10mV then you must reduce the gain. I have explained this already. The maximum recommended power supply you can use is 15V. If the power supply is 15V then the maximum output of stage 3 is 12V. The maximum overall gain is 12V/10mV=1200. So if the input V1 is 10mV the maximum overall gain possible is 1200. So the maximum gain per stage is 10.6. You could use 12*10*10.