Alu Definition and 19 Threads

  1. Pipsqueakalchemist

    In a ALU in a simple processor, what does the operation BNEQZ mean?

    TL;DR Summary: So I'm doing this coding assignment that involves a simple processor with an ALU. I have a list of operation of the ALU but I don't understand one operation called BNEQZ. I have the list of operation below and an example of it being used to form some loop. Would be very grateful...
  2. PainterGuy

    Implementation of ALU using Verilog

    Hi, I'm trying to learn Verilog and was exploring different ways to write a simple Verilog code for Arithmetic Logic Unit, ALU. I was going through this webpage: https://esrd2014.blogspot.com/p/8-bit-arithmetic-and-logic-unit.html I'm just curious to know that why they are using 16 bit output...
  3. Y

    Bolt Thread Pullout (failure) in alu 6063-T6

    I need advice how to calculate thread pull out in aluminium 6063-T6. 12 bolts screwed into an aluminium plate (thread depth 25 mm) must withstand a load of 350 kg. Thanks in advance
  4. J

    Microprocessor Question -- ALU operations

    Homework Statement [/B]Homework Equations Division by two means moving the bits right by 1 unit. 2's complement = 1's complement + 1 The Attempt at a Solution For Question: 6 Number is 11010110 This is 2's complement. So to find original number we subtract by 1 and get: 11010101 Now we do 1's...
  5. G

    ALU status register carry equation

    I was wondering what the carry (C) equation for the logic gates would be in an ALU status register? I originally thought that it was C equals the last carry output. However, my colleagues tell me its C equals to the sum of the last bit primed AND the last carry output. Can someone clarify my...
  6. nmaganzini

    Is 70ps a Normal Propagation Delay for a 90nm Full Adder?

    Hi guys, I was just wondering, I'm designing a full adder for a bitslice of a 16 bit ALU. I have SPICED my design and I am getting a propagation delay for the AND mode between the two bits of about 70ps. I'm working in a low voltage 90nm process. Am I in the right ballpark in terms of...
  7. Mr.Robot

    Interfacing 8 Bit ALU on LCD ( fpga kit )

    I have the code of 8 bit ALU and code of lcd controller mounted on spartan 3E fpga kit. but i am unable to sync the program. Please help me with it! Thank you!
  8. vead

    Building an 8-bit Processor: ALU, Decoder & Multiplexer

    If I want make 8 bit processor I think I need following think 1) ALU 2)control unit 1)ALU responsible for Arithmetic and logic Unit 2)control unit include with multiplexer and decoder circu main component for processor ALU 8 bit decoder multiplexer Q1 I have option for decoder decoder...
  9. S

    How Do You Start Designing a 4-Bit ALU with Multisim?

    Hallo guys , I am first year electrical Engineer Major & we are asked to design and simulate using Multisim a small ALU , The ALU is a 4-bit digital circuit that performs addition, subtraction, ANDing, ORing, complementing, XORing, XNORing and comparison. The ALU also outputs if the answer is...
  10. B

    Shear Modulus value for Alu bronze

    Hello, Does anyone have the shear modulus value for Alu Bronze CW307G-R680 Cheers Ben
  11. J

    Understanding the ALU: Uncovering CPU Functionality

    Hi! I am new here and I have come to feed and develop my curiosity in mathematics and sciences. School is not enough I guess... The ALU is the part of the CPU in which every instruction is executed, right? But I don't understand, the OS itself is a software in machine language, it is...
  12. B

    How to Calculate Heat Loss in an Aluminum Pipe with Fluid Flow?

    Homework Statement Through a pipe made of aluminum, length of 1m which outer radius is r1=3,5 cm and inner radius is r2=3 cm flows a fluid with temperature of t1= 30 °C. How much heat does get lost through the walls of the pipe, in \tau=3h if the temperature around the pipe is 20 °C. Heat...
  13. D

    How Can I Design a 4-bit ALU with Integrated Memory for My Project?

    Homework Statement In this lab, we are supposed to design and build a multi-page schematic for the operation of an 4-bit arithmetic logic unit (ALU) capable of performing addition (ADD), negation (NOT), and bitwise AND (using Mutlimedia Logic). You will then build a memory with four lines...
  14. S

    How Do You Design a 4-Bit ALU with Basic Logic Gates?

    Homework Statement HI This 4 bit ALU requires 8 functions in a bit slice, and satisfies following criteria Also, it can only be constructed via basic logic gate..and,or,not,xor... No filp-flop...etc. S1 S2 S3 OUTPUT 0 0 0 Shift A Through (X = A) 0 0 1 Shift input A Left (X = A...
  15. S

    Altera Quarts II 4bit ALU design

    Homework Statement Hello! As a part of my course i am required to produce a 4 bit ALU using altera quartus. However i have very little experience with the software and cannot continue. the input data is 2 4bit numbers A & B. The data should be read by the positive edge trigger of a clock...
  16. E

    Need help with ALU design instructions

    Homework Statement Hello! I need to implement a "branch if greater than or equal" and a "set if less than" in my 16-bit ALU (MIPS architecture),but I'm having some difficulties with it. Homework Equations The "set if less than" I think,if one considers overflow,it could be...
  17. R

    Designing a 4-bit ALU: Functions & Solutions for a Microprocessor

    Homework Statement A 4-bit arithmetic and logic unit (ALU) is to be designed for a 4-bit microprocessor. The ALU has two 4-bit wide inputs, labelled ii and i2 and a 4-bit output labelled out. In addition there is a carry-out bit. Design the ALU so that it implements the following functions...
  18. E

    Help Needed for 16-bit ALU Design (MIPS)

    Homework Statement Hello! I need to implement a set greater than and a branch less or equal in my 16 bit ALU design(MIPS architecture),but I'm having many difficulties. Homework Equations The Attempt at a Solution I know that in a set greater than a>b equals a-b>0 ,but I...
  19. A

    How to Implement an ALU at Gate Level in Verilog?

    Hello guys, i want ALU implemented in gate level in verilog, please help me
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