Decoder Definition and 52 Threads

These are the two questions.Here's a datasheet for the demux I've been using: https://ecee.colorado.edu/~mcclurel/sn74ls138rev5.pdf Here's my work: If you need to see how I got these sum functions, here's the work for that: Now, if you look at the datasheet for the demux (linked above), you'll...

Somebody on the Slack for one of my online classes shared this interesting mobile website where you can draw a mathematical symbol and get the LaTeX equivalent. http://detexify.kirelabs.org/classify.html

Homework Statement a) Design a 3:8 Decoder using 5:32 Decoder. b) Design a 5:32 Decoder using 3:8 Decoder. Homework Equations - The Attempt at a Solution a) b) ( X3 and X4 are grounded , because we need 3 inputs only ) Could someone check my answer please ?

Homework Statement How to design a 2 to 4 Decoder using 4 to 16 Decoder ? Homework Equations - The Attempt at a Solution Truth Table : A B 0 0 0 1 1 0 1 1 ( O3) Is my answer correct ?

I'm working on this code for my programming class and I'm completely stuck. Here is what I have so far but I keep getting error messages. import java.util.Scanner; public class TextMsgAbbreviation { public static void main(String[] args) { String BFF ="best friends forever"...

Homework Statement Draw a block diagram of 32kx8 bit RAM memory using decoders DEC 3/8 and memory components 8kx8 bit. 2. The attempt at a solution First we find the number of memory components: N=\frac{32kx8}{8kx8}=\frac{2^{18}}{2^{16}}=4. The number of decoders is 32/8+1=5 There are 4...

I found this thread https://www.physicsforums.com/threads/software-ntsc-decoding.47403/ , where somebody had a similar requirement, but it's old and locked so I can't post in it. However I really need such software decoder (one that has been verified by engineers intimately familiar with the...

Homework Statement 4. FIGURE 1 shows how a 3 to 8 line decoder (74138) can be used in conjunction with NAND gate (74133) to connect a set of switches to the data bus of a microprocessor system via buffers (74367). Answer the following questions relating to the diagram: a) What address, in HEX...

Homework Statement Design an combinational circuit using a decoder and external gates defined by the boolean functions F1, F2, F3(see picture) Homework EquationsThe Attempt at a Solution I'm quite confused as to the exact method in doing this. I understand that a decoder takes n inputs and...

Homework Statement I'm doing some review for an exam this week. this problem was on the review sheet, but we did not cover any examples like it during lecture. The problem is: Show how to implement the function f(w3, w2, w1) = ∑m(0, 1, 3, 4, 6). Use a 74LS138 and NAND gate(s) Homework...

Homework Statement Design a 4 input priority encoder with a 4 to 16 decoder and a 8 to 1 multiplexer. Homework Equations Priority encoder is where when the highest priority bit is equal to a logical "1", then the rest of the lower priority input are ignored.The Attempt at a Solution For the...

Hello , I am going to make decoder for micro controller , I want to know how does decoder make for microcontroller so I made following example just for learning I have 4 registers I =Instruction Register A= Address register R1= register R1 R2 =register R2 I A R1 R2 0000...

I don't understand what the point of a multiplexer is. I see the purpose of a selector circuit and a decoder, as an appropriate address will cause a unique gate to output a logic high, but I don't see the point of "OR"ing them together to get a single one or zero at the end. Please help

If I want make 8 bit processor I think I need following think 1) ALU 2)control unit 1)ALU responsible for Arithmetic and logic Unit 2)control unit include with multiplexer and decoder circu main component for processor ALU 8 bit decoder multiplexer Q1 I have option for decoder decoder...

Hi. I am confused a bit about the solution for 2:4 decoder in the picture below. Please help me with the question in the figure. Thanks.

Homework Statement Draw a diagram to show how to implement a 8 to 1 multiplexer with two 4 to 1 multiplexers and a 2 to 4 binary to decimal decoder. Homework Equations / The Attempt at a Solution I know that I'm going to need another select line (S2) since an 8 to 3 multiplexer has 3...

Show how the function f(w1,w2,w3,) = Ʃm(0,1,2,4,7) can be implemented using a 3 to 8 binary decoder and an OR gate (hint look at a MUX built using a decoder and figure out how to remove the AND gates. I know that a 3 to 8 decoder would have something like this: w1 w2 w3 f0 f1 f2 f3 f4...

Homework Statement "You are to receive a message using the RSA system. You choose p = 5, q = 7 and E = 5. Verify that D = 5 is a decoder. The encoded message you receive is 17. What is the actual (decoded) message?" Homework Equations The Attempt at a Solution N= pq = 35, our E...

So all my 3:8 decoders have outputs only at 1 and 0. I need a tristate decoder that can be configured so that the unused outputs are open circuits (i.e. high impedance). I know how to build a 3:8 decoder (using logic gates). How might I go about modifying it so that it has tristate outputs? Is...

build 1 bit comparator using "2 to 4" decoder?? Homework Statement The Attempt at a Solution worked out truth table: A B A>B A<B A=B 0 0 0 0 1 0 1 0 1 0 1 0 1 0 0 1 1 0 0 1 prty sure that's right. just need part B...

For this question Why is the answer not m(0,1)? Little confused here. Any help will be appreciated. Thanks

Homework Statement Given that the variables A[2:0] form a three bit grey code to represent numerical values: i) Write down all binary combinations for A[2:0], in ascending order of numerical value ii) A three bit grey code to decimal decoder is to be designed, where the outputs X[0:7]...

Homework Statement http://img96.imageshack.us/img96/7671/decca.jpg Got a 3 to 8 decoder here 1) Explain the circuit action 2) List the values of A0, A1, A2 so that light number D4 will turn on 3) Given, that the entry values, A0, A1, A2, are 111 accordingly. Which light is on? 4) Can you...

Hello all, I have a lab this afternoon that I was going over to ensure I was prepared for it. However, I am not entirely sure about the last part of the lab. Any help or reassurance is appreciated! Decoder Glitches- Use a 3 input AND function to detect the logic state corresponding to "6" in...

I don't know why they circle the 001 .011. 100.101. 110 .because I saw the textbook showed for 3to 4 decoder. Y0 =1 since 00. Y1 = 1 since 01. Y2 =1 since 10,Y3 = 1 since 11. But for this problem . I am so confused.

There's a store owner who has 8 aisles numbered 0-7. Each aisle has a light above it to indicate if that aisle has a sale. Only one light can be on at a time. The store owner has a switch that can be set from 0-7 and has a 3-bit output representing the switch position in binary. A second switch...

Hi, I am thinking on working on a project where I would make use of a speaker and sound decoder chip , to transmit digital signal into audio. I am at a problem at part selection. I can't seem to find the right part for the job. I just need the part to be cheap, less than $5 and work on human...

I'm trying to create a full adder using one 3-to-8 decoder and some nand gates. As of now I know I will have X, Y, and C_in as my inputs. I am having trouble with figuring out what the 8 outputs of the decoder should be, so I am unsure about where and how to use the nand gates. Anyone able to...

whats the difference between a decoder and demuliplexer? what are the applications of decoder and demultiplexer?

I have no idea about how to use two "enable inputs". (the second part of the question)

Homework Statement A circuit containing 24KB RAM is to be interfaced to a 68000-based system,so that the first address of RAM (the base address) is at $002000. (a)What is the entire range of RAM addresses? (b)Design a PARTIAL address decoder using three 8KB RAM ICs. 2. The attempt at a...

a 3-to 6 binary decoder has an enable signal.When disabled or invalid code is applied to the decoder ,the decoder will output zeros.When enabled,input codes from 000 to 101 are decoded.Draw the block diagram of 3-to-6 decoder and define its behaviour using a truth table. may i know how to do...

I have been given the following components to design a 4 to 16 decoder: I. One 3 to 8 decoder (with enable) II. Two 2 to 4 decoder (with enable) III. Two NOT gates IV. Two AND gates I just don't understand where the AND, NOT, and enables go into. I have attached two files One with the 3...

Homework Statement Design a 5:24 decoder using three 3:8 decoders and one 2:4 decoder. 1)Show the truth table. 2)Draw a block diagram of the final decoder. Use X4 as the MSB and X0 as the LSB. 2. The attempt at a solution I have the truth table drawn. Because it is a 33 line truth table I...

I need to design a full adder using a 3-to-8 decoder. I have the code for the 3-to-8 decoder but don't know how to use it as a full adder. Please help. Thanks //3-to-8 Decoder library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; entity Decoder is port (...

Hi, I wonder is there a decoder avalible for the following function? If not what is the simplest way to build one? Input: 0 0 0 0 Output: 0 0 0.....0 Input: 0 0 0 1 Output: 1 0 0.....0 Input: 0 0 1 0 Output: 1 1 0.....0 Input: 0 0 1 1 Output: 1 1 1.....0 Input: 1 1 1 1...

hi, how does one connect a telephone line with a DTMF decoder(e.g CM8870). i.e which telephone wires(of the 2 pairs of the telephone cable) to i connect to the 8870? again if i use a cell/mobile phone how to i connect to the 8870? any help will be appreciated.

Is it possible to separate a specific frequency signal from a wide range of signals from a decoder/demux. For an example if you had a frequency range from 1 hertz to 100 KHz, is it possible to separate a signal of let's say 60Hz from the other signals.

1. if i i have two "4 bit full adders" and two decoders and three seven segments and i wanted to add numbers in binary with the input and convert it to decimal and show it on the seven segments 2. i did everything and i put the "Carry out" from the first adder into the "Carry in" of the...

I'm trying to program the write action for a register file. Basically I have 16 instances of a register file whose inputs are: enbl - the enable signal write_data - data to be written to register clk - clock and a single output, out, which is the value of the register. The problem I'm having...

Hey guys, I have two questions about something I'm trying to minimize. I'm making a binary to seven segment decoder in Verilog, and I have a truth table set up. The board I'm going to be placing this on is active low. My questions: I want to reduce, or minimize, this truth table, I was...

1. Hi i basically need information on how to construct a 4-to-16 line decoder made of four 2-to-4 line decoders each of the smaller decoders is equipped with two active-LOW enable inputs and i am allowed to use 2 inverters in addition to the four decoders. and also Show how to construct a...

Hi.. my HW question reads: Design a circuitboard based on a 74154 4 line to 16 line decoder that will output a HIGH henever the 4 bit binary is greater than 12 and output a low when it is less than 12 or equal to 12. http://pdf1.alldatasheet.com/datasheet-pdf/view/7826/NSC/74154.html I have...

How to realize a BCD to Excces3 Code converter using only 3-8 Decoder(s) and four NAND gates?

I am asked to implment an address decoder for the 68k with the following units: 4MB of eeprom using 512k*8 chips, 1 MB of RAM using 128k*8 chips, 4MB of DRAM using 512k*4 chips, and 128 bytes of i/o space. I do not understand the question very well, and any help would be appreciated.

Hello everyone, I was wondering if someone could send me a website or a picture that shows what a 4 to 16 line decoder looks like, thanks.

could someone draw a clear distinction between these two for me? or are they basically the same? Decoder usually takes several inputs (2^n) and produces n outputs. Multiplexer is a switch but demultiplexer...if it's inverse of multiplexer than it has to have at least several inputs but the...

Hello, What is a good way to implement the logic for a 10 bit (10 to 1024) decoder? A method that is systematic, has low fanout, fanin, propogation delay, and capacitance is desired. It would be helpful if you could find some websites that implement this design. Thanks, James

This is one of the problems I have for homework: Consider a BCD-to-seven-segment decoder and suppose that the BCD data are represented by the logic variables B8, B4, B2, and B1. For example, the decimal number 7 is represented in BCD by the word 0111 in which the leftmost bit is B8=0, the...

Hello science fellows! I have a problem.I would like to do surround decoder in Matlab.Does enybody knows how to do it?How should I get started?What kind of test could I apply:simple sine signal in .m file or some .wav file? Many thanks for help