Logic gate Definition and 39 Threads

Hey all, I have a 5v IC that is triggered by a sensor to unlock the 12v lock, I am using a NPN transistor as a switch with the 5v VCC as the gate, I need it to sink back to the GND of the IC without blowing it, is this safe? If not what changes would you suggest, it has been years since I've had...

Is ohmic resistance a "necessary evil" in order for transistors to be able to function as logic gates? I mean, I have seen some circuits for the NAND gate in RTL and TTL and they both seem to involve ohmic resistances. Can we make a super conducting NAND gate that will have total ohmic...

Hello, I don't know much about logic gates and how they work. I was wondering if this (Image) can work. (Is something like this possible?) The idea is that if we have logic 1, AND gate gives 1 while NOR gives 0. And vice versa.

At our class on digital structures, this assignment has been given. It's a preparation for upcoming lab work, and I'm not sure my design is correct. Is anyone please willing to check it out? 1. The problem statement, all variables, and given/known data Design a two-bit comparator using NOR gates...

We're implementing Dots and Boxes to logic circuits and the we would like to automate the process of changing turns. If you know the game, the game changes turn when one move doesn't score a point or form two or more boxes. I was able to create overlapping XOR gates that alternates from high to...

Homework Statement (a) The diagram represents a NAND gate with two inputs, T1 and T2, and an output X. Copy the truth table above and complete it. Show how a NAND gate can become a NOT gate. (b) Draw up a truth table for the combination of NAND gates shown above. 2. The attempt at a...

Homework Statement Construct a truth table for the combination of logic gates shown above. 2. The attempt at a solution First of all the combination of logic gates with added letters to the combination: The truth table: I think it should be correct. But just want to be sure.

Homework Statement Complete the truth table for the simple combination of logic gates shown above. 2. The attempt at a solution I think this should be correct, but just want to check, since I don't have a book answer to compare:

Hi, I have this logic gate http://www.ti.com/lit/ds/symlink/sn54hc32.pdf I am using 5V as my VCC. In the datasheet it says that the output current at 6V is 5.2mA. My question is, Is that the max current that it can output ?

Hi everyone. I would like to ask about this light sensor using not gate circuit. I use LDR as an input and a LED as an output. I have tried this circuit in Proteus, and it works. When the LDR 'off', LED turns on, and vice versa. But i don't really understand about the working principle of this...

Homework Statement A particular logic gate takes two binary inputs A and B and has two binary outputs A' and B'. I won't reproduce the truth table. Suffice to say every combination of A and B is given. The output is produced by A' = \text{NOT} \ A and B' = \text{NOT} \ B . The input has...

Homework Statement 2. The attempt at a solution Circuit: A B G D E F C 0 0 1 1 1 1 0 1 1 0 1 0 1 0 0 0 1 1 1 1 0 1 1 0 1 0 1 0Answer: Is (a) right? And any ideas what could be (b)?

Hello, I'm currently studying a course in digital logic. The course is included in my IT program. And I have not taken a course in electronics yet; I will later. My question basically is: what is the output of a logic gate given that one input is neither connected to a high voltage nor...

I've been reading Code: The Hidden Langauge of Computer Hardware and Software by Charles Petzold, and he described the 5 basic gates (AND, OR, NAND, NOR, & XOR) with extreme clarity. In the chapter about adding machines, he described that we needed a gate that relays only when it receives a 0...

I am a High school student, I have read about Logic gates but when it comes to practical use I am confused. I am building a small project where I want to use OR and AND gate, but I don't know In which form they are available in the market, how to connect them on breadboard and how to power them...

Homework Statement Hi, it's me again. Now I am going to design a 4-bit magnitude comparator using just ONE 4-bit adder and infinitely large number of gates (AND, OR, NOT, NAND, NOR, XOR, XNOR) for signed numbers (negative binary). Homework Equations A > B => A3barB3 + A2barB2x3 +...

Homework Statement Okay, This time it's an exam question. I am doing some past papers and there are questions about comparators which are not introduced in this course (this course is preliminary course for engineering students who are interested in electrical, electronic or computer...

I want to supply some LED's and a motor from an outside source of electricity (i.e. a battery pack, wall outlet, batteries in series, etc.) and want to use the Arduino to be able to "switch" on and off these sources so that I am able to control long strands of LED's with the Arduino (for like a...

The problem statement Hi I'm writing a report on a design of a basic all-NAND circuit. In reality, how are these circuits made ? Do we just use TTL etc. integrated circuits and combine them as necessary? Thanks

Homework Statement [/B] Impliment the expression which is already in minimum sum of products form using only two-input NAND gates. No gate may be used as a NOT. All inputs are available both uncomplemented and complemented. (The number of gates required is shown in parentheses.) f = ab'd' +...

Hi, I have used Digital Works and Logisim for doing things like building memory cells out of logic gates and general study of sequential logic. The free version of Digital Works does not work on my 64 bit windows computer at work, and Logisim does not offer all of the features of Digital Works...

My question seems like it should be posted in Computer Engineering section, but below is how I found this word. I was reading the textbook: Quantum Computation And Quantum Information - by Michael A. Nielsen and Issac L. Chuang. and I came across with the this word; "1.3.1 Single qubit gates...

Hello, I just joined because I am having a serious issue figuring out a logic gate circuit with 4 source signals, and a non active state and two items that activate depending on a number of different states for each signal. I've been giving myself a headache for hours trying to puzzle this out...

So this summer I plan on taking a long break from my arduino and learning some more 'ancient' and fun stuff. I plan on learning to use and make different circuits using TTL's. I have read a bit on it and learned on the basic logic gates like(using '/' as separator for the reverse) n/and,n/or...

any logic gate simulator that gives you the boolean algebraic expression at the end?

So I am well familiar with how bi-state logic (with 0s and 1s) works in gates. 0+0=0; 0+1=1+0=1+1=1 etc. What happens if an input to a gate is neither 0 nor 1, but has an high-impedance value? Will it disable the logic gate from working? Will the logic gate simply ignore that input? Anyone...

I viewed previous tests on the internet. There are logic gate problems in a test. What subject do this logic gates problems belong to? What book do you recommend for understatnding this subject?

Homework Statement http://media.newschoolers.com/uploads/images/17/00/58/56/03/585603.png Homework Equations None The Attempt at a Solution I have tried just messing around with them, and I have tried to turn this table into a "boolean" expression. I have no idea how I would begin to solve...

Homework Statement I was having a casual chat with one of my professors and he presented me with a problem that after 4 hours of attempting I believe is unsolvable. the set up is pretty simple. you have 3 inputs x,y,z that go into a system, the output is ~x,~y,~z. However you are only allowed...

Homework Statement How to make a logic gates only using NAND gates of the following diagram. How many NAND gates I would have to use for that diagram Homework Equations The Attempt at a Solution I know that A bar bar + B bar bar =AB A bar bar B bar bar = A+B De-morgans Theorem

Logic gates can be switched to a high state, where the current flow is cutoff and a low state, allowing current to flow through. What electromagnetic processes in the semiconductor material enable this to happen? Since the switching action is purely electronic and there are no moving parts...

Basically, I'm trying to generate a short pulse when the user pushes a button using a CMOS gate and a rudimentary RC charging circuit. It all simulates fine in Multisim, but I'm concerned what will happen when I run this for real (still waiting for parts in the mail). Here's the diagram...

What do "two-level" and "multi-level" gate circuits mean? I have been doing questions relating to logic gates circuits, and have noticed that some questions say "implement with two-level NAND gate circuts" And then a different question would say "implement with multi-level NOR gate...

I know this is probably in the wrong board, but. I'v just been looking into some Boolean algebra to convert truth tables into a set of logic gates representing a circuit. If i were attempting to represent a certain truth table, but i was limited to ONLY using NAND gates. (their the only...

Homework Statement I'm studying logic gates and trying to create my first one. Homework Equations 3. In a TV programme, the panel votes on new performers. The panel consists of a Chairman (C) and three others (X, Y and Z) who each press a button to register their vote. The SUCCESS light is...

Do quantum logic gates perform measurements? (collapse the wavefunction) For example: If I apply a cNOT gate to a pair of cubits with wavefunction 1/\sqrt{2} |10> + 1/\sqrt{2} |00> what would I expect as the result? 1/\sqrt{2} |11> + 1/\sqrt{2} |00> ? or 1|11> or 1|00> or...

I want to simplfy M'(A'B'C+ABC')+M(AB'C'+A'BC) to as simple a circuit as possible. I don't know the boolean algebra to simplfy the ABC terms. Help please, Speck

Trying to find out information on NAND and NOR logic gates and which, if any, may be less reliable at higher speeds. Supposedly this would have something to do with propagation delays and triggering times.

merged with the other thread by enigma