- #1
zeion
- 466
- 1
Hi,
I'm learning Verilog and came across this demo code for a music synthesizer. I was looking over the code for it and, needless to say, it's pretty overwhelming for a beginner. I was hoping I could change the demo songs in the demo_code1 and demo_code2 files, so to make the FPGA play a different demo song; but it seems that when I replace the song steps the sound becomes distorted and screechy... What would be causing this?
I know its a lot to look over but... hopefully some of you Verilog nerds will be able to help me out?![Stick Out Tongue :-p :-p](data:image/gif;base64,R0lGODlhAQABAIAAAAAAAP///yH5BAEAAAAALAAAAAABAAEAAAIBRAA7)
I'm learning Verilog and came across this demo code for a music synthesizer. I was looking over the code for it and, needless to say, it's pretty overwhelming for a beginner. I was hoping I could change the demo songs in the demo_code1 and demo_code2 files, so to make the FPGA play a different demo song; but it seems that when I replace the song steps the sound becomes distorted and screechy... What would be causing this?
I know its a lot to look over but... hopefully some of you Verilog nerds will be able to help me out?