- #1
jubayer ahmed
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- TL;DR Summary
- whenever i tried to simulate the circuit . PSpice keep showing me this ...How can i fix this?
Are My Nets Aligned with Pins in PSpice(9.1) Netlist Error?
- Thread starter jubayer ahmed
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In summary, PSpice is reporting an error when simulating the circuit. Changing the value of R1 may help to reduce the error.
- #2
phyzguy
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Hmmm. Is there an error log somewhere telling you what the ERC error is? What frequency is V1? Do you get the error for all frequencies? Also, what if you increase the value of R1 to add more dissipation? Does that help?
- #3
Baluncore
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Welcome to PF.
I am an LTspice user, not a Pspice user.
What type of simulation?
Apart from the ground reference, there are only two nodes in the circuit.
The capacitor is connected directly across an AC voltage source.
What is the Earth symbol ? AGND or GND, it must be node 0.
Start with a minimum system, a voltage source with a resistive load. Get that working.
Then add and test the inductor, then the capacitor.
Avoid units on values. Or one day you will define a 1 farad capacitor as having a value of 1F, then it will take another day to find it has a value of 1 femtofarad.
I am an LTspice user, not a Pspice user.
What type of simulation?
Apart from the ground reference, there are only two nodes in the circuit.
The capacitor is connected directly across an AC voltage source.
What is the Earth symbol ? AGND or GND, it must be node 0.
Start with a minimum system, a voltage source with a resistive load. Get that working.
Then add and test the inductor, then the capacitor.
Avoid units on values. Or one day you will define a 1 farad capacitor as having a value of 1F, then it will take another day to find it has a value of 1 femtofarad.
- #4
phyzguy
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@Baluncore may have highlighted the problem here. Try putting a small resistor in series with the capacitor.Baluncore said:
- #5
berkeman
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Agreed, the cap across the AC source is what stood out to me as well.
- #6
LvW
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I do not think that the capacitor is the problem.
My simulation programs (TOPSPICE, PSPICE) do accept such a simple circuit.
Each node must have a dc connection to ground - this seems to be fulfilled.
My simulation programs (TOPSPICE, PSPICE) do accept such a simple circuit.
Each node must have a dc connection to ground - this seems to be fulfilled.
- #7
Baluncore
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The capacitor should not be the problem, but the lack of a load, or an impedance in series with the cap, suggests that the circuit topology is unusual.
The circuit needs to be minimised to the point where it works, or a known good example circuit needs to be gradually edited and tested until it becomes the new circuit. That should identify the step that causes the problem.
The circuit needs to be minimised to the point where it works, or a known good example circuit needs to be gradually edited and tested until it becomes the new circuit. That should identify the step that causes the problem.
- #8
LvW
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I only can repeat that my simulators accept the circuit as it is.
Question: What about the connection between R1 and L1 ?
Question: What about the connection between R1 and L1 ?
- #9
berkeman
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Does your AC voltage source element include an output resistance?LvW said:
- #10
LvW
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No - it is an ideal ac source.
- #11
berkeman
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Can you get more information about the error? From the PSpice User's Manual:jubayer ahmed said:
https://www.seas.upenn.edu/~jan/spice/PSpice_UserguideOrCAD.pdf
- #12
eq1
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jubayer ahmed said:
Hi Jubayer, It's a bit hard to tell but I think the nets are not aligned with the pins on the schematic you drew so the pins are not actually touching the wires. This is a common problem in EE CAD tools when the parts and the schematic are on different grid spacings. Here is how you check: pspice has a way to export the netlist. I think when you view the netlist you'll find that none of the nets are closed, basically all your parts are unconnected. If that's the case then you'll want to change the grid in the primary window to match whatever grid was used in the symbols.
- #13
berkeman
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That seems more likely now than the AC source driving the capacitor. I just ran a quick test in Micro-Cap and it also does not have a problem directly driving a capacitor.eq1 said:
FAQ: Are My Nets Aligned with Pins in PSpice(9.1) Netlist Error?
What does the "Netlist Error" mean in PSpice(9.1)?
The "Netlist Error" in PSpice(9.1) refers to an error that occurs when the connections between components in a circuit are not properly defined. This can happen when the nets (connections) are not aligned with the pins of the components in the netlist, which is a list of all the components and their connections in a circuit.
How do I know if my nets are aligned with pins in PSpice(9.1)?
You can check if your nets are aligned with pins in PSpice(9.1) by reviewing the netlist of your circuit. The netlist will show the connections between components and their corresponding pins. Make sure that the nets are connected to the correct pins of the components in your circuit.
What causes the "Netlist Error" in PSpice(9.1)?
The most common cause of the "Netlist Error" in PSpice(9.1) is when the connections between components in a circuit are not properly defined. This can happen when the nets are not aligned with the pins of the components in the netlist. Other possible causes include incorrect component values or missing components in the netlist.
How can I fix the "Netlist Error" in PSpice(9.1)?
To fix the "Netlist Error" in PSpice(9.1), you will need to review and correct the connections between components in your circuit. Make sure that the nets are aligned with the correct pins of the components in the netlist. You may also need to check and correct any incorrect component values or missing components in the netlist.
Can I prevent the "Netlist Error" from happening in PSpice(9.1)?
Yes, you can prevent the "Netlist Error" from happening in PSpice(9.1) by carefully reviewing and double-checking the connections between components in your circuit before running the simulation. Make sure that the nets are aligned with the correct pins of the components in the netlist. It is also important to use correct component values and include all necessary components in the netlist.