- #1
nitin.jain
- 21
- 0
Hi All,
I have made a photodetection circuit that is supposed to work in a broadband-freq regime (from a few kHz to around 100 MHz). I essentially subtract the currents of two PIN photodiodes (that are reverse biased), and amplify this difference (I_diff) in two stages - the first is essentially a transimpedance stage, while the second enhances the voltage gain.
This is also known as homodyning (pardon me, if you were already familiar with the term). Both stages are opamp-based inverting configurations. I've attached a pic of the schematic, conveying the main idea (opa 847 is the opamp I'm using).
Currently, I am trying to get the DC operation of the circuit to work. I've the individual stages running quite okay -- by adjusting the resistances at the non-inverting inputs (R4 and R10 in the pic), I can get the individual DC offsets below 40 mV (with no input signal i.e.).
However, if I cascade them, then the output of the second stage goes beyond 4.0 V ! It also seems to find some capacitance, because this voltage seems to discharge (very) slowly. And it probably is also loading the earlier stage.
Can anyone tell me if the resistive bridge between the two stages (please see image) could largely be the culprit for this behaviour? If yes, how should I choose the values so as to minimize? Currently, I've tried R19=R16=100 ohm, R2=50 ohm and R9=4.0K and R3=R5=1.8K.
I've designed (and am testing) this circuit on a PCB. I've tried to avoid all possible pitfalls I knew about -- all the components are SMD, I am using enough bypass capacitors for the opamp supplies, the supply tracks are on one side of the board and the other side is almost 80% GND plane. I can post an image of the board too, if required.
I would be very grateful to get your views and suggestions!
Thanks,
Nitin
I have made a photodetection circuit that is supposed to work in a broadband-freq regime (from a few kHz to around 100 MHz). I essentially subtract the currents of two PIN photodiodes (that are reverse biased), and amplify this difference (I_diff) in two stages - the first is essentially a transimpedance stage, while the second enhances the voltage gain.
This is also known as homodyning (pardon me, if you were already familiar with the term). Both stages are opamp-based inverting configurations. I've attached a pic of the schematic, conveying the main idea (opa 847 is the opamp I'm using).
Currently, I am trying to get the DC operation of the circuit to work. I've the individual stages running quite okay -- by adjusting the resistances at the non-inverting inputs (R4 and R10 in the pic), I can get the individual DC offsets below 40 mV (with no input signal i.e.).
However, if I cascade them, then the output of the second stage goes beyond 4.0 V ! It also seems to find some capacitance, because this voltage seems to discharge (very) slowly. And it probably is also loading the earlier stage.
Can anyone tell me if the resistive bridge between the two stages (please see image) could largely be the culprit for this behaviour? If yes, how should I choose the values so as to minimize? Currently, I've tried R19=R16=100 ohm, R2=50 ohm and R9=4.0K and R3=R5=1.8K.
I've designed (and am testing) this circuit on a PCB. I've tried to avoid all possible pitfalls I knew about -- all the components are SMD, I am using enough bypass capacitors for the opamp supplies, the supply tracks are on one side of the board and the other side is almost 80% GND plane. I can post an image of the board too, if required.
I would be very grateful to get your views and suggestions!
Thanks,
Nitin