DC input random offset voltage for diff. amplifier with current-mirror load

  • #1
eyeweyew
36
5
TL;DR Summary
how the expression for DC input offset voltage for diff. amplifier with current mirror load come about
I am trying to figure out how the derivation of equation 6.69 come about on page 426 in the book Analysis and Design of Analog Integrated Circuits, 5th Edition by Gray and Meyer. They defined on page 424 under section 6.3.3 the input offset voltage (VOS) of op amps with differential inputs and single-ended outputs as the differential input voltage for which the dc output voltage is midway between the supplies. But I don’t see VSS and VDD in the equation so I am not sure if they are using this definition since they did mention another definition for VOS under 6.3.3 which is the differential input voltage for which the op-amp output voltage is zero but I try to follow the similar derivation on pg. 234-236 under 3.5.6.6 and 3.5.6.7 for diff. amp with resistors pair as loads but I still don’t get how do they come about equation 6.69?Analysis and Design of Analog Integrated Circuits, 5th Edition
http://fa.ee.sut.ac.ir/Downloads/AcademicStaff/24/Courses/73/[Gray___Meyer]_Analysis_and_Design_of_Analog_Integrated_Circuits_5th_ed.pdf
 
Last edited:
Engineering news on Phys.org
  • #2
eyeweyew said:
But I don’t see VSS and VDD in the equation so I am not sure if they are using this definition ...
The supply voltages can be assumed typical, equal and opposite, and sufficient for the circuit to operate.

Supply voltage is independent, since the circuit is symmetrical. The supplies are isolated from the differential input pair, by the collector or drain voltage of the other transistors employed.

Part of the elegance of employing a current mirror as the load, is supply voltage independence, while the gain of the differential input pair is effectively squared.
 
  • Like
Likes berkeman and dlgoff
  • #3
eyeweyew said:
TL;DR Summary: how the expression for DC input offset voltage for diff. amplifier with current mirror load come about

I am trying to figure out how the derivation of equation 6.69 come about on page 426 in the book Analysis and Design of Analog Integrated Circuits, 5th Edition by Gray and Meyer. They defined on page 424 under section 6.3.3 the input offset voltage (VOS) of op amps with differential inputs and single-ended outputs as the differential input voltage for which the dc output voltage is midway between the supplies. But I don’t see VSS and VDD in the equation so I am not sure if they are using this definition since they did mention another definition for VOS under 6.3.3 which is the differential input voltage for which the op-amp output voltage is zero but I try to follow the similar derivation on pg. 234-236 under 3.5.6.6 and 3.5.6.7 for diff. amp with resistors pair as loads but I still don’t get how do they come about equation 6.69?Analysis and Design of Analog Integrated Circuits, 5th Edition
http://fa.ee.sut.ac.ir/Downloads/AcademicStaff/24/Courses/73/[Gray___Meyer]_Analysis_and_Design_of_Analog_Integrated_Circuits_5th_ed.pdf
Ok, Never mind. The derivation is actually on page 332-333 in the same book.
 

FAQ: DC input random offset voltage for diff. amplifier with current-mirror load

What is DC input random offset voltage in a differential amplifier with a current-mirror load?

DC input random offset voltage refers to the unintended voltage difference between the inputs of a differential amplifier when the output is zero. This offset is caused by mismatches in the transistors and other components within the amplifier circuit, including those in the current-mirror load.

How does a current-mirror load affect the offset voltage in a differential amplifier?

A current-mirror load can contribute to the offset voltage in a differential amplifier due to mismatches in the transistors forming the current mirror. These mismatches can cause unequal currents in the differential pair, leading to an offset voltage at the input.

What are the primary sources of random offset voltage in a differential amplifier?

The primary sources of random offset voltage include mismatches in the transistor threshold voltages (Vth), variations in transistor dimensions (W/L ratios), differences in mobility, and mismatches in the resistors or current sources used in the circuit.

How can the random offset voltage be minimized in a differential amplifier with a current-mirror load?

The random offset voltage can be minimized by careful matching of the transistors in the differential pair and the current mirror, using layout techniques such as common-centroid layout, and ensuring that the fabrication process is tightly controlled. Additionally, offset trimming techniques and calibration can be employed to further reduce the offset voltage.

Why is it important to minimize the offset voltage in a differential amplifier?

Minimizing the offset voltage is crucial because it directly affects the accuracy and performance of the differential amplifier. High offset voltage can lead to errors in signal processing, reduced common-mode rejection ratio (CMRR), and overall degradation of the amplifier's performance in precision applications.

Back
Top