- #1
xortan
- 78
- 1
Homework Statement
I need to design a MOS voltage amplifier with a gain of 50.
Homework Equations
tox = 5 nm
u = 500 cm2/V-s
Cox = 6.903 mF/m
λ = 0.1
Vdd = 2.5V
The Attempt at a Solution
I am getting confused on just about everything...
I am to design a voltage amplifier with a gain of 50 V/V that is connected between a 100k source and a 2k load. We can use more than one stage so I was going to use one common-source with a gain of 10, second stage is a common-source with gain of 5 and the last was going to be a source follower with a gain of 1.
I started out by picking a Vgs of 0.7 and a Vdsat of 0.2...don't know why it was just kinda arbitrary I guess.
I calculated my Id based off this equation Id = 1/2 * Cox * u * (W/L) * Vdsat2
I varied my W while keeping L constant. From my Id I was able to calculate my gm by using the equation 2*Id / Vdsat.
I know the equation for the gain of a common source amplifier is [itex]\frac{Rg}{Rg + Rsig}[/itex]*[itex]\frac{Rd}{1/gm + Rs}[/itex] so I made my Rs 100 times larger than 1/gm and made my Rd 11 * (1/gm + Rs).
However when I enter the Rs and Rd values in LTSpice I am getting a drain current which is over 5 orders of magnitude away and its just really frustrating.
Please someone help! This thing is due in like 5 days and I've spent like 15 hours working on this and I can't even design a basic common-source amplifier. If you can provide links or write down some steps to follow in a design procedure that'd be great.