Handling bursty data in hardware

In summary, the aim of the project is to turn an IP core into a dataflow actor/node, so that it can easily be included in a design environment that uses dataflow modelling.
  • #1
ineedmunchies
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Ok so I'm just beginning a year long MSc project. It will, hopefully, eventually involve a method to turn an IP Core into a dataflow actor/node. This actor/node can then easily be included in a design environment that uses dataflow modelling to design digital hardware.

But first I need to get my head around a few concepts, and the initial stepping stone is dealing with bursty data, as the hardware cores will only run when there are enough "tokens" available at their inputs for them to operate correctly. So basically does anyone have any ideas how I could do this with hardware? Essentially tell the processing block not to operate, until there is sufficient tokens at each input. These tokens will not be arriving in a continuous stream. They will arrive when they are produced by other cores, which can be considered random for the mean time.

I was considering a counter on each input, the counter would count each "token" that joins the queue, and then reduce the count by however many "tokens" are "consumed" when the processing core "fires." However I felt that this may be wasteful and wondered if anyone else had any ideas? I can't seem to find anything about it from googling, and wouldn't know where to start looking in books. All of the stuff about handling bursty data seems to be from the software point of view.
 
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  • #2
One idea I had was to use a FIFO buffer, and set a certain threshold that needs to be met before the processing core can fire. Once the threshold is reached, the processing block can access the FIFO buffer and retrieve the tokens it needs. However, this would require the FIFO buffer to be large enough to handle all of the tokens in the bursts.Another idea is to have a "token rate" counter that constantly tracks the rate at which tokens are arriving. When the token rate exceeds a certain threshold, then the processing core can be triggered. This would be similar to setting a threshold on the FIFO buffer, but without having to store the actual tokens.Finally, I was also thinking of using a "Token Ready" flag. This flag would be set during the dataflow simulation, when a certain number of tokens are received at each input. The flag would indicate that the processing core can start execution. Any help with this would be greatly appreciated!
 

Related to Handling bursty data in hardware

1. What is bursty data in hardware?

Bursty data in hardware refers to a type of data that is transmitted or processed in short bursts or bursts of high intensity, followed by periods of little or no activity. This can occur in various types of hardware, such as computer systems or networks, and can be caused by factors such as high demand or limited processing capabilities.

2. Why is handling bursty data important?

Handling bursty data is important because it can significantly impact the performance and efficiency of hardware systems. If not properly managed, bursty data can lead to delays, bottlenecks, and system crashes. Therefore, it is crucial to have strategies in place to effectively handle bursty data in order to maintain optimal system functioning.

3. What are some techniques for handling bursty data in hardware?

There are several techniques for handling bursty data in hardware, including buffering, queuing, and load balancing. Buffering involves temporarily storing data in a buffer to smooth out bursts of activity. Queuing involves organizing data into queues and prioritizing their processing. Load balancing involves distributing data and processing tasks across multiple hardware resources to prevent overload in any one area.

4. How can bursty data be monitored and analyzed?

Bursty data can be monitored and analyzed using various tools and techniques, such as network traffic analysis, statistical analysis, and machine learning algorithms. These methods can help identify patterns and trends in bursty data, which can then be used to optimize hardware systems and improve their performance.

5. What are some challenges in handling bursty data in hardware?

Some challenges in handling bursty data in hardware include accurately predicting and anticipating bursts, ensuring sufficient resources for processing bursts, and minimizing delays and disruptions caused by bursts. Additionally, different types of hardware and data may require specific approaches and strategies for effective burst handling.

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