How Can DeMorgan's Law Be Applied to Implement (A+B).(A+C) Using NAND Gates?

[aurao2003]

Homework Statement

Hi
I am struggling with the diagram of this question. Can anyone help? I would have loaded my diagram but unsure how to do it. This is the question:

Starting with the following statement (A+B).(A+C), show how this can be implemented using NAND gates using DeMorgans law.



Cheers

Homework Equations

The Attempt at a Solution

After doubly negating, I obtained (A.B) + (A.C). And this is where I get stuck.
Please help. I have a deadline looming this week.

 

[ehild]

Try to expand and then simplify the expression first.

ehild

 

[aurao2003]

Thanks for a response. I am okay with the maths but unsure about the actual diagram. Any pointers? Thanks.

 

[ehild]

The double-negated (A+B).(A+C) is not A.B+A.C.

If you do not know how to draw the diagram, see http://www.kpsec.freeuk.com/gates.htm. Copy the figures and construct the circuit from them.
If you do not know how to upload it into your post, click on "Go Advanced".

ehild

 

[asteriatic]

DeMorgans law states that the negation of a conjunction (AND) is the disjunction (OR) of the negations of the individual statements. In this case, (A+B).(A+C) can be written as ~(~(A+B) V ~(A+C)). We can use this to implement the expression using NAND gates as follows:

1. Start by creating two NAND gates, one for each term (A+B) and (A+C).
2. For the first NAND gate, connect A and B as inputs. The output of this gate will be ~(A+B).
3. For the second NAND gate, connect A and C as inputs. The output of this gate will be ~(A+C).
4. Use a third NAND gate to connect the outputs of the first two NAND gates. This will give us ~(~(A+B) V ~(A+C)), which is equivalent to (A+B).(A+C).
5. Finally, use a fourth NAND gate to negate the output of the third NAND gate, giving us the final expression (A+B).(A+C) implemented using NAND gates.

I hope this helps. Let me know if you have any further questions. Good luck with your deadline!