- #1
mossfan563
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Homework Statement
Pretty much, I'm trying to make a 4-bit 4 to 1 mux using gates.
However, I'm having problems trying to make it.
Homework Equations
None
The Attempt at a Solution
So far this is what I have and whenever I try to implement this in Xilinx, I get errors.
Yes, I know I'm trying to force in a 4 bit input into an AND gate that's only allowing 1 bit and the same can be said for the output of the OR gate at the end.
Not sure what to do here.
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