How to Integrate a Counter in a Data Transmission Circuit?

In summary, the student is trying to design a data transmission circuit using gates. They have completed the part of CRC and parity, but now need help with the transmission part. They are using a counter tocount the time of data division until 8, and then transmitting the remainder from CRC to do the parity. They have connected the counter to their circuit, but are having trouble controlling the clock on the 74165 IC. Lastly, they are having trouble transmitting 11 bit empty bits first to the receiver.
  • #1
ws0619
53
0
Hi!

I want to design a data transmission circuit (transmit 7 bits data with 1 start, stop, and parity bit) by using gates.

The part I have done is CRC and parity.Now I want to design the transmission part, I want to use a counter to count the time of data division until 8 then transmit the remainder from CRC to do the parity.So where can I connect the counter to my circuit?

I am using 74175(IC) to register the CRC code, 74165 to load the 7 bits of my data into the system, two 7483 for adding (process of 2 complement), one 74194(data load from 7475 if the adder output is positive value,if not the 74165 will shift data into it), and one 7475(store data of the remainder).

When the 7 bits all have transmitted to the adder and the 7475 output data stopped changing, I want to transmit it to parity part.So I need one counter to count until 8( make sure the data of the remainder is in final state )Where should my counter connect?

For transmission, initially I need to transmit 11 empty bits first to the receiver, how can I do it?because when my circuit clock is on, my data will load into the circuit.

Thanks!
 
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  • #2
ws0619 said:
Hi!

I want to design a data transmission circuit (transmit 7 bits data with 1 start, stop, and parity bit) by using gates.

The part I have done is CRC and parity.Now I want to design the transmission part, I want to use a counter to count the time of data division until 8 then transmit the remainder from CRC to do the parity.So where can I connect the counter to my circuit?

I am using 74175(IC) to register the CRC code, 74165 to load the 7 bits of my data into the system, two 7483 for adding (process of 2 complement), one 74194(data load from 7475 if the adder output is positive value,if not the 74165 will shift data into it), and one 7475(store data of the remainder).

When the 7 bits all have transmitted to the adder and the 7475 output data stopped changing, I want to transmit it to parity part.So I need one counter to count until 8( make sure the data of the remainder is in final state )Where should my counter connect?

For transmission, initially I need to transmit 11 empty bits first to the receiver, how can I do it?because when my circuit clock is on, my data will load into the circuit.

Thanks!

Show us your work so far. This is obviously homework, but I'll let it stay here in EE if you show us in detail what you've done, and what part you're having trouble with. We can offer tutorial help, but will not do your schoolwork for you.
 
  • #3
Thank you!

I have work out the circuit of division. I choose 74194 to insert 4 bits data from the latch ( the remainder of each part in the division process). 74165 as the shifting ( the output of the 74165 is connected to 7483 adder and 74194 ). 74175 as the register of CRC-3bit( I have chosen 1011 for the CRC-3bits data) and connected to 7483 adder.7483 is coonected to 7475 latch and ANDing clock and the (cout) of the 7483 to active the latch. The division process that I used is 2 complement addition.Clock is connected to all the IC.

Am I make you clear now?

My problem is I don't know how to control the 74165 IC's clock, the 1st value that I insert in this IC can be shifted to the right, but start from the second value, it cannot shift to right.Although the pin (synchronous Parallel Load Input) has set to high.Can anyone help me solve it?

To complete the CRC, I need to get the final remainder to divide with the original 7 bits data, so I need to count until 8 for the clock(each clock 1 bit data is shifting in) so how to create a conter like that?

Next is during transmission. I need to make the system to send 11 bit empty bits first, I have no idea how to pulse my CRC system when the system started.

I hope you can give me some advise to do my project.
 

FAQ: How to Integrate a Counter in a Data Transmission Circuit?

What is data transmission with counter?

Data transmission with counter is a method of sending and receiving data between two devices using a counter as a control mechanism. The counter keeps track of the number of bits being transmitted and received, ensuring the accuracy and integrity of the data.

How does data transmission with counter work?

Data transmission with counter works by using a counter as a control mechanism to keep track of the number of bits being transmitted and received. The data is broken into smaller packets and each packet is assigned a unique number by the counter. The receiving device checks the counter to ensure that all packets have been received in the correct order and no data has been lost.

What are the benefits of data transmission with counter?

Data transmission with counter offers several benefits, including increased accuracy and reliability of data transmission, improved error detection and correction, and efficient use of bandwidth by eliminating the need for constant synchronization signals.

Are there any limitations to data transmission with counter?

One limitation of data transmission with counter is that it may not be suitable for real-time applications that require immediate data transmission. The use of a counter may also introduce a delay in the transmission process, which can be a disadvantage in time-sensitive applications.

How is data security ensured in data transmission with counter?

Data security is ensured in data transmission with counter by using encryption techniques to protect the data during transmission. Additionally, the use of a counter helps to prevent data from being intercepted or altered by unauthorized parties, as the receiving device can detect any discrepancies in the counter values and reject the data if necessary.

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