- #1
jaydnul
- 558
- 15
1) When a FET is completely on, the voltage drop across the drain-source is ideally 0. This means that when completely on, [itex]V_{ds}<V_{gs}[/itex]. Why doesn't the FET go into ohmic/triode mode when [itex]V_{ds}[/itex] dips below [itex]V_{gs}[/itex] ?
2) Why are we measuring these voltages relative to the source (for a standard n-channel fet)? What is it about the geometry of the semiconductor that makes the operation predictable by measuring the voltages relative to the source?
Thanks
2) Why are we measuring these voltages relative to the source (for a standard n-channel fet)? What is it about the geometry of the semiconductor that makes the operation predictable by measuring the voltages relative to the source?
Thanks