Proteus: Creating a 16*8bit RAM with D flip flops

[SpaceBoB]

Homework Statement

Hey!
I need to create a RAM in Proteus Suite. The RAM should have 16 storage spaces each containing 8bits of data (16*8bit RAM) and the output should be a three-state output. I've tried to create one, but I can't seem to get the hang of this three-state thing, and I think the even the decoders which I have used at the beginning of the circuit are not used in the right way as well.

Homework Equations

How should this be working? I get an error: Logic contention detected on net _______

The Attempt at a Solution

You can find it in the attachement below.

 

[KataKoniK]

Hi there!

Creating a RAM in Proteus Suite can be a bit tricky, but I can definitely help you out. First of all, the three-state output refers to a logic level that can be either high, low, or high impedance (disconnected). This allows multiple devices to share the same output without interfering with each other. In order to achieve this, you will need to use a three-state buffer in your circuit.

As for the decoders, make sure you are using them correctly and that they are connected to the appropriate inputs. Also, check for any logic contention errors by making sure that there are no conflicting signals on the same net. This can be resolved by adding additional buffers or using pull-up/pull-down resistors.

I would also suggest breaking down your circuit into smaller sections and testing each one individually before combining them into one circuit. This will help you identify and troubleshoot any potential issues more easily.

Attached is an example of a 16*8bit RAM with a three-state output that I have created in Proteus Suite. Take a look and see if it helps you with your design. Let me know if you have any further questions or if you need any additional assistance. Good luck!