- #1
jean28
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Homework Statement
I need to simulate a AND/NAND gate with Emitter Coupled Logic. As I'm sure that most of you know, ECL is mostly used to make OR/NOR gates, so finding out how to make a NAND/AND gate is not as easy as it sounds.
Homework Equations
The Attempt at a Solution
I attached an image of a possible model that I found online. However, how do I know which values I should put in order to make the circuit work? How do I know which voltages should be in VBB1, VBB2, etc?
Thanks