Thermal Dissipation of High-Power Electronic Subassemblies

[Solid-Statist]

TL;DR Summary

How hot do power semiconductors operate in comparison to their heat sinks?
Would reducing this ∆T enable higher power operation, and so more output?

High-power electronic subassemblies – housing CPU or power-conversion semiconductors, for instance – require significant thermal dissipation to keep their chip-junction temperatures at or below their maximum operating temperature. (As a rule-of-thumb, every 10^oC increase in junction temperature cuts the semiconductor’s useful lifetime in half.) Silicon semiconductors have a maximum operating temperature of 150^oC, with Silicon Carbide chips being considerably higher (max 250^oC?) and Germanium chips being considerably lower (max 70^oC).

These subassemblies require a heat-sinking system to dissipate the thermal energy away from the semiconductors. The subassemblies are generally permanently mounted on a metal baseplate that can be mechanically attached with conventional hardware, to the metal heat sink that is in contact with ambient air or cooling fluid to transfer heat away from the device.

Between the unit’s semiconductor junction(s) and the metal baseplate, electronic subassemblies often have laminar interlayers – solderable metal, ceramic, PCB, etc -- for mounting devices and stepping down the difference between the layers in Coefficient of Thermal Expansion (CTE). Silicon chips have a CTE of only 2.6 ppm/^oC, while the aluminum baseplate and heat sink would have a CTE of 23 ppm/^oC, a 9X difference in expansion/contraction rates.

A representative cross-section of a power-electronic subassembly is shown below.

​

NOTE: Layers of thermal-interface materials (TIM) connect the various interlayers together, both thermally and mechanically (hardware may be required).​

In traditional discrete surface-mount power devices (SMPD) and mechanically-attached power devices, such as the TO-220, the temperature difference between the power semiconductor and the bottom of the device baseplate or ‘case’ -- ∆T_{junction-to-case} – is an important metric in ensuring safe operating conditions.

Assuming that the generic POWER-ELECTRONIC SUBASSEMBLY shown above is a single ‘power device’ enclosed in a case with a metal-baseplate bottom, the device should have a consistent temperature difference during full operation between its heat-generating power semiconductor(s) and the heat sink surface to which the device baseplate is attached, or ∆T_{junction-to-case}.

What is the temperature drop between the semiconductor chip(s) and the heat sink (∆T_{junction-to-case}) in conventional applications that handle high-power loads, generating lots of heat to be dissipated? High-power applications include:

• Central processing units (CPUs)
• Power conversion
• Light-emitting diodes (LEDs)
• Pulsed devices
• Charging devices

Additionally, if the ∆T_{junction-to-case} on these applications could be reduced, would that allow higher-power operation from the same devices, providing more output at the same semiconductor operating temperature?
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[Spammy link redacted by the Mentors]

 

[berkeman]

Welcome to PF.

There are some errors in what you posted. When heat sinking is important there will be no ceramic or PCB FR4 material between the power component's external thermal metal pad and the heat sink it is mounted on. Look up how a TO-220 package is typically mounted to a heat sink.

The slight variation on that is when the exposed thermal metal pad on the power component is not a ground (like for PNP power transistors used in push-pull type power stages). In that case there is a thin Mica pad that is placed between that exposed metal and the grounded heat sink. Thermal heat sink grease is also used to lower the $\theta$ thermal resistance.

There is also an option to mount the high-side power component to a heat sink directly if that heat sink is not user-accessible. Otherwise you would risk folks getting a nasty shock if they touched the heat sink... (do not ask me how I know this!)

 

[DaveE]

Welcome to PF.

There are some errors in what you posted. When heat sinking is important there will be no ceramic or PCB FR4 material between the power component's external thermal metal pad and the heat sink it is mounted on. Look up how a TO-220 package is typically mounted to a heat sink.

The slight variation on that is when the exposed thermal metal pad on the power component is not a ground (like for PNP power transistors used in push-pull type power stages). In that case there is a thin Mica pad that is placed between that exposed metal and the grounded heat sink. Thermal heat sink grease is also used to lower the $\theta$ thermal resistance.

There is also an option to mount the high-side power component to a heat sink directly if that heat sink is not user-accessible. Otherwise you would risk folks getting a nasty shock if they touched the heat sink... (do not ask me how I know this!)

For high power devices that require electrical isolation, mica isn't favored, ceramics work better. Back in the day it was BeO, which is hazardous to manufacture thus expensive and no longer used. The go to choice now is AlN, or Alumina if you want cheaper stuff. All would be soldered in packages like SOT-227 (Isotop) or coated with a thin layer of Si heatsink grease if assembled separately.

For less heat flow thermoplastic films or ceramic/metal loaded silicon sheets are used. Mica is too expensive for most applications.

 

[DaveE]

I guess you're asking about the interstitial "gap filling" materials used? Check out the front part of this, it lists lots of choices. But in my experience good old fashion heatsink grease is the best.

https://www.mouser.com/catalog/supplier/library/pdf/Aavidselectionguide.pdf

 

[Solid-Statist]

There are some errors in what you posted.

Sorry, I'm not a packaging engineer ... and I got that stack-up schematic from a colleague who is also not a packaging engineer. And, yes, FR4 is absolutely horrible for thermal dissipation, compared to ceramic, etc.

I just wanted to show a simplified internal stack-up for, say, maybe a DC/DC-brick power supply with a bonded aluminum baseplate with a number of interlayers. (I do know that the tiny semiconductor in a TO-220 is generally soldered directly to the nickel-plated copper baseplate of the device, maximizing thermal dissipation, before the device over-molding with epoxy.)

While I would like to learn all I can about the packaging aspects of the interlayers, I want to consider them all encompassed into a 'single package' -- is the term here 'case', or something else? -- so that the magnitude of the ∆T during operation between the power semiconductor(s) and the heat sink surface can be compared across various device designs and applications. Even educated guesses would be helpful...

Here's an uneducated guess for a baseplated power supply with its semiconductor(s) running at 125^oC: The ∆T might be 30^oC, between the chip junction and the heat sink surface.

It's straightforward to monitor heat sink surface temperature during operation ... the temperature of embedded semiconductors under full power not-so-much.

 

[DaveE]

Sorry, I'm not a packaging engineer ... and I got that stack-up schematic from a colleague who is also not a packaging engineer. And, yes, FR4 is absolutely horrible for thermal dissipation, compared to ceramic, etc.

I just wanted to show a simplified internal stack-up for, say, maybe a DC/DC-brick power supply with a bonded aluminum baseplate with a number of interlayers. (I do know that the tiny semiconductor in a TO-220 is generally soldered directly to the nickel-plated copper baseplate of the device, maximizing thermal dissipation, before the device over-molding with epoxy.)

While I would like to learn all I can about the packaging aspects of the interlayers, I want to consider them all encompassed into a 'single package' -- is the term here 'case', or something else? -- so that the magnitude of the ∆T during operation between the power semiconductor(s) and the heat sink surface can be compared across various device designs and applications. Even educated guesses would be helpful...

Here's an uneducated guess for a baseplated power supply with its semiconductor(s) running at 125^oC: The ∆T might be 30^oC, between the chip junction and the heat sink surface.

These are not difficult calculations. However, you'll need a scenario to analyse with real data, things like power flow, temperatures, area, thickness, thermal conductivity, etc. The heat flow path is something that needs to be designed, there are many different ways to do this, most are constrained by the application so the idea of optimization is complex.

I see no real point in guessing. Sure, it could be 30^oC, or something else, it depends on the application. It's like asking how big the engine is in an automobile.

Perhaps your best approach for now would be to search the web for sample designs, or heatsink design guidelines so you can see how it's calculated and then do some of your own scenarios to get the comparisons you seek.

Maybe something like this:
https://cds.cern.ch/record/2038661/files/311-327-Kunzi.pdf

 

[hutchphd]

good old fashion heatsink grease

I think what this is depends upon how old (fashioned) you yourself are. For instance do you mean silicone grease or zinc oxide impregnated hydrocarbon grease? Eye of the beholder.

 

[Solid-Statist]

These are not difficult calculations. However, you'll need a scenario to analyse with real data, things like power flow, temperatures, area, thickness, thermal conductivity, etc. The heat flow path is something that needs to be designed, there are many different ways to do this, most are constrained by the application.

I see no real point in guessing. Sure, it could be 30oC, or something else, it depends on the application. It's like asking how big the engine is in an automobile.

Q: Is automobile engine horsepower calculated or measured?

I do know that there's lots of calculation methodology for thermal modeling, but also understand that there are loads of uncertainties there.

With thin thermal-interface materials (TIMs), by far the most reliable thermal-performance metric is the ASTM D5470 test, looking at uni-directional heat flux within a column stackup with spaced thermocouples measuring ∆T.

https://analysistech.com/thermal-material-testers/thermal-conductivity-testing/​

[This company specializes in D5470 testing, so may be biased.]​

​

Just looking for some 'real world' macro-∆Ts for actual operating power-electronic equipment ... seems kinda straightforward, guess not.

 

[DaveE]

Is automobile engine horsepower calculated or measured?

yes.

seems kinda straightforward, guess not.

Designs can be very straight forward for a given set of parameters. But guessing the range of parameters you are interested in seems nearly impossible, so far. The issue at hand is describing the problem, then solving it is easy. This is how it usually is with cooling standard semiconductor devices.

Sorry you're not getting the estimate you seek. I don't know your answer. Maybe someone else does.

 

[Solid-Statist]

Designs can be very straight forward for a given set of parameters. But guessing the range of parameters you are interested in seems nearly impossible, so far. The issue at hand is describing the problem, then solving it is easy. This is how it usually is with cooling standard semiconductor devices.

Sorry you're not getting the estimate you seek. I don't know your answer. Maybe someone else does.

In characterizing traditional discrete power devices, like TO-220s, manufacturers generally provide a thermal resistance from the junction-to-case (θ_JC, oC/W), so that users can calculate its expected temperature rise for a given power load.

https://www.electronics-cooling.com...ee-dimensional-conjugate-heat-transfer-world/​

I was hoping to characterize and compare complete high-power subassemblies with the same basic outlook as a discrete device’s θ_JC, but just focusing on the macro-system’s ∆T, assuming that the temperatures can be measured (I understand that directly measuring temperature of an embedded operating semiconductor can be tough).

As an aside, on measuring-vs-calculating performance, when I make a new prototype design of an electronic laminate, I prefer to take it to extreme conditions to destroy the bond, which highlights failure modes and avenues for improving robustness and performance … kind of like crash-testing automobiles on a table top, but less messy. Liquid-to-liquid 300^oC thermal shocks can be awesome.

 

[DaveE]

I was hoping to characterize and compare complete high-power subassemblies with the same basic outlook as a discrete device’s θJC

The module manufacturers will provide all of this thermal modelling information, although they will usually only focus on the internal elements under the highest stress. Here's a randomly selected data sheet that has the thermal resistance spec. Either they all do, or you'll need to ask. However, they will not tell you how to provide the external cooling design, there are too many possibilities and they don't want to mislead you (or be responsible).

https://www.infineon.com/dgdl/Infin...N.pdf?fileId=5546d46277921c320177b9447dce438e

 

[Tom.G]

Are you maybe after a general approach/way of thinking about the problem?
If so, try this:

This approach uses the equivalence of electrical and thermal circuits.

• Consider the Watts you need to dissipate as the equivalent of a current source
• Consider the case temperature as the maximum voltage allowed at the case
• The material stack from the Case to the Cold Sink (often air temperature) is a bunch of series resistors

The problem reduces to finding the maximum resistance that will conduct sufficient 'current' to keep the 'voltage' at the current source (case) below the maximum.

R _THERMAL = (Maximum Temp) / Watts

The result (R _THERMAL) is everything between the Case and the Cold Sink (air). You have the freedom to arbitrarily distribute this thermal resistance in the stack-up between the device case and the cold sink.

Usually a tentative heatsink is chosen next with a somewhat lower resistance than needed, because the device mounting with a possible insulator will add some resistance.

If the required heatsink size is larger than the available space, forced air cooling is often an option. The heatsink manufacturers generally provide thermal resistance-vs-air flow curves for forced air cooling of their different models.

Hope this helps a little.

Have Fun!
Tom

p.s. Don't forget about a hot day when the air conditioning fails. Customer get really upset if their equipment dies!

edit: fixed spelling error

 

[hutchphd]

And of course the important initial step in any such "stacked" design process is to identify the worst parts (the weak links in the chain). These bad actors (because of steady state or realistic fluctuations) are often all one needs to worry about, and so identifying them is the real effort-reducing step.

 

[Solid-Statist]

I was hoping to characterize and compare complete high-power subassemblies with the same basic outlook as a discrete device’s θJC, but just focusing on the macro-system’s ∆T, assuming that the temperatures can be measured (I understand that directly measuring temperature of an embedded operating semiconductor can be tough).

Since CPU subassemblies have had built-in silicon temperature sensors / thermo diode monitors for years -- see below the ‘Core Temp’ report on my cheesy laptop’s CPU – as an on/off switch for its cooling fan, I guess that I assumed that this temp-sensing technology might be common in other high-power applications…

…it’s certainly been around long enough. Here’s nifty 1999 overview from Analog Device on the exciting new approach for ‘measuring computer chip temps’ with silicon sensors:

Measuring temperatures on computer chips with speed and accuracy -- a new approach using silicon sensors and off-chip processing | Analog Devices​

 

[berkeman]

I guess that I assumed that this temp-sensing technology might be common in other high-power applications

I don't know of any offhand, but there certainly could be some. In a product design that I helped with a couple years ago that involved a moderate-power BJT amplifier that could overheat if driven with too high of a duty cycle, we built our own temperature sensor with a diode that was closely thermally coupled to the heat sink of one of the BJTs.

We had several ADC blocks inside our associated ASIC, so we built our own 2-current drive circuit and used one of the ADC blocks to digitize the $V_f$ junction voltage values while alternating between those two test currents. Using the diode equation and a little calibration info, you can get a pretty reasonable reading of the diode temperature using that technique. When we sensed an over-temp approaching on the power amp transistors, we throttled back on the duty cycle of that amplifier to keep it within its operating range.

 

[Solid-Statist]

We had several ADC blocks inside our associated ASIC, so we built our own 2-current drive circuit and used one of the ADC blocks to digitize the Vf junction voltage values while alternating between those two test currents. Using the diode equation and a little calibration info, you can get a pretty reasonable reading of the diode temperature using that technique. When we sensed an over-temp approaching on the power amp transistors, we throttled back on the duty cycle of that amplifier to keep it within its operating range.

Excellent feedback, thanks!

This sounds like what I recall as 'pulse testing', seeing it done years ago with a TO-220 device to compare the relative cooling performance of various thermal-interface materials (TIMs). Using keywords from your response, I was able to locate this 2006 primer on the methodology:

Using Forward Voltage to Measure Semiconductor Junction Temperature | Tektronix​

The author notes that embeddable temp sensors are often as big as the high-power chip junction(s) being monitored, so conventional 'thermocoupling' is pretty useless in those applications.

One method that could be employed is to place a temperature sensor very close to the semiconductor junction and measure the sensor output signal. As the heat flows to the outside area, it would cause a rise in temperature of the area and the sensor. This is straightforward, but there are physical limitations to this technique due to the finite size of the sensor. In many cases, the sensor itself would be larger than the junction to be measured. This would add a large thermal mass to the system, and additional error to the measurement which would lessen the accuracy of the measurement. Therefore, this technique would not be very useful in most applications.