- #1
js2020
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- TL;DR Summary
- Why is PCB space tracing based on voltage and not e-field intensity? Wouldn't the required spacing change with dielectric?
I understand that PCB trace spacing is typically based on a minimum found in certain standards and that is voltage based. If the breakdown strength of the dielectric is based on e-field intensity, wouldn't it be beneficial to actually consider the material properties and make it based on a maximum e-field intensity even if we consider some intensification factor due to the copper edge?
I have the same question about the layer spacing, even if we included some derating factor based on dielectric thickness.
I have the same question about the layer spacing, even if we included some derating factor based on dielectric thickness.