I've figured out the resultant force on the gate by adding the magnitudes of F1, F2, and F3. However, I'm trying to figure out the distance b such that there is absolutely no force acting on the stop at point B. Is this even possible? It seems like it isn't, since all forces are pointing to the...
Homework Statement
http://imgur.com/vXkg0
Homework Equations
Fw=γAH
Ycp=bh3/(12)(h/2)b + (h/2)
The Attempt at a Solution
I found the angle of the gate from the horizontal to be 53.1 degrees. Using this, I found y to be 2.5m and H (vertical distance to centroid) to be 6 m...
From what I learned at school today..
Afaik NOT gate acts as an inverter, right?
Which means if input is 0, output will be 1 and vice versa.
My question is, if input is 0 then output will be 1. From where does the gate gets its current flow? Since input is 0.
Or, it cannot be used like...
I need to automate a gate that is 4.91mtr in length, the motion should be swing type and the angle of rotation to be about less than 180 degree. and the mass of the gate is about 300kg, now should I use a dc motor and if so what should be rating of the same, the rpm required about 5-8...
Why does the SCR remain 'ON' even though the gate pulse is removed?
I understood the two transistor model but I want to know the bare physics of it. If you remove the gate pulse only the +ve anode w.r.t. cathode remains, thereby making junction J2 reverse biased hence current should fall of...
Homework Statement
A tainter gate for a lake is 21' tall and 14' wide and the water level is 17 feet from the surface to spillway. When the work is done how much water will flow through the gate if the gate is raised 2 ft, 7ft, and 10ft and how high does the gate have to be raised to maintain...
Homework Statement
A tainter gate for a lake is 21' tall and 14' wide and the water level is 17 feet from the surface to spillway. What force is the water placing on the gate at the top, middle and bottom? Also when the work is done how much water will flow through the gate if the gate is...
Homework Statement
Part of a past paper, I can do all of the question a-d without problems but the second part of e) is giving me trouble.
So you have the following state
\frac{1}{\sqrt{2}}(\mid 0 \rangle_{A} + \mid 1 \rangle_{A})\mid 0 \rangle_{B}\mid 0 \rangle_{C}
You apply a...
Homework Statement
A false mud gate made of common steel for a damn is 6'6" wide, 21'1" tall, and 1/2" thick. Assume a constant density throughout. What is the required force to lift this gate if it were laying flat on the ground and a hoist was attached to the center of gravity? also where is...
Homework Statement
It given the expression . how to construct the complex CMOS gate by looking at the expression.
Homework Equations
The Attempt at a Solution
This solution is given as well.
I don't understand how he construct it. I know NAND is fromed by two PMOS in...
Hello. One of my friends told me that the logic function for (A.or.B).and.(C.or.D) is
From a book, I know the P1, P2 , N1, N2 form a NAND. The same for P3, P4, N3, N4.
And P5, P6, N5, N6 form a NOR.
My question is, is this circuit the same as (A.or.B).and.(C.or.D) ?
Thank you
Hello,
I am having a bit of an issues rearranging an equation for my solid state electronics class. I seem to have a mental block with this sort of stuff, so I am hoping someone can help.
The equation is
0.34 = 1.05((0.64 + |VBS|)1/2 - (0.64)1/2)
I know the usual stuff, like + to a -...
Logic gates can be switched to a high state, where the current flow is cutoff and a low state, allowing current to flow through. What electromagnetic processes in the semiconductor material enable this to happen? Since the switching action is purely electronic and there are no moving parts...
Hi Everyone,
I am working on an engineering design project for University, and am struggling to calculate the forces some of the mechanical equipment will require.
*This is a conceptual design. If anyone would like more details on how it is meant function, or has suggestions, feel free to...
http://www.tutorvista.com/content/physics/physics-iv/semiconductor-devices/logic-gates.php
I don't know how to post a pic so please go to this site and look at the OR gate
why is resistance R connected to the point C. I don't understand its use? I think the OR gate would function without it...
Homework Statement
I was looking through some examples in my Digital Logic book and I stumbled across one that gave an answer of x1\uparrow(x2\uparrowx2). The answer I got was x2\uparrow(x1\uparrowx2).
After making a truth table I'm finding that these are not equal solutions. Unless, I'm...
Hi there
I am working through a quantum gate section of my course and I am a bit puzzled on how to calculate a matrix for consecutive quantum gates. I understand how to generate a matrix for
|q0⟩--------[H]-------
|q1⟩------------------
Which is simply the tensor product of the hadamard...
Homework Statement
Basically and most importantly... I wanted to see if I got my F function correct. That's at clause 2.
At clause 3 I'm told
a = b = 1
c = d = 0
and to calculate
At clause 4 I'm asked if the logic value of P is 1, if the logic value of Q matters...
The...
Hello all,
Did a lab pertaining to numerous gates (AND, Or, etc) and we decided to measure the input when nothing was connected. We found the voltage to be ~1.06V. Is this voltage we are reading have something to do with the threshold voltage? If not, can someone explain what is happening here...
How do you implement different gates by using a two-input multiplexer? What are the inputs supposed to be? How do you implement an AND gate, for example? An OR?
Hi,
I'm an engineering student pursuing BE(bachelor in engineering) in electronics and communication.
Right now I'm in my 2nd year(of the 4 year course). I plan to appear for the GATE exam in my final year, for admission to MS/MTech programmes in IISc/IITs(Indian Institute of Science/Indian...
i don't understand how an applied Voltage on a (intrinsic) Carbon Nanotube could change its conductance... There is not a population inversion like in mosfet. So, which is the physics? Where this carriers can from?
thank you.
Homework Statement
Sketch the output waveform for the given circuit and inputs (see attachment)
Homework Equations
For AND gate: x = AB (multiply the inputs to get the output)
The Attempt at a Solution
attached is my sketch.
How to multiply 2 waveforms?
1. Guys how can I draw this equation C.(A(+)B)+ A.B only using Nand gates?
3.I have minimized it but just don't know how to draw it only using Nand gates.
Thanks.
I'm having trouble understanding why the Fredkin gate is universal. I am getting nowhere when I am trying to build a NOR gate, which would prove that the Fredkin is universal.
(There's 3 inputs, C, I1, and I2)
I am designing cmos logic xor gate and 2:1 multiplexer.
In my design i am using 8 pmos and 8 nmos for 2:1 mux and 6 pmos and 6 nmos for xor gate.
I am using pmos and nmos to implement complement A, means that i am not using complement directly into the circuit.
So , i want to know that is it...
Hello all, trying to figure this out. I work at a shipyard and operate/maintain the drydock. The discharge tunnel that flows water out into the ocean has culverts about 24.5' x 15.5' x 8'. Connected to the bottom of the culvert is a 48" pipe that goes to a gate valve of the same diameter. If I...
This is a very long argument between me and a supplier of a electric linear actuator for opening gates.
In the image below you can see how I currently have the gates configured, and how they are suggesting I have them configured.
My question is this...
Would I be correct in saying...
Hi,
I want to know more about Dual Gate MOSFETs, i.e, their structure, working, advantages etc... Googling "Dual Gate MOSFET" didn't help at all! So please suggest some sources (online) where I can find more information on them.
Also, where can I find more information on current...
If an AND gate is basically two switches in series, and an OR gate is two switches in parallel, how would you physicaly make a NAND/NOT/NOR gate? What is physically going on in the microchip which has these gates?
Hi there
I'm currently doing a digital fundamentals paper and I was wondering if anyone could identify a logic symbol on the spec sheet attached, and what's it used for. It's on page 4, and the logic symbol is a diamond that is surrounded by 4 traingles. Theres eight of them and it's near...
Transistor "not gate" function
I've been trying to understand the following circuit:
I'm new to circuitry and electrical engineering, so I've had some trouble understanding the function of transistor Q3 and diode D2, I believe the circuit should function without them. If anybody could...
Homework Statement
Consider the cross section of a sluice gate, which is a device for controlling the flow of water in channels. Determine the force on the gate per unit width of the gate.
Hint: think of each line as a surface, with the length given above, and 1 foot of depth in the direction...
Aight, so I've been going into/out of the library a lot lately to study since my desk at my flat sucks. I usually listen to music on headphone when walking to/studying in the library, and I have noticed that when I walk through the little security gate things (the two panels on either side of...
Homework Statement
True or false:
a two input nor gate is designed to have the same worst case rise and fall times. The best case fall time is smaller than the best case rise time in this gate.
Homework Equations
-
The Attempt at a Solution
The second part i get, the best case fall...
Hi guys, this is to make something for a uni project I'm doing, not asking for the answers to a homework-type problem so I wasn't sure if it should go in the homework section, but if you think it should let me know and I will move it.
So the project background is a timing system for solar...
Hi, I am new to EE.
On this page - http://hyperphysics.phy-astr.gsu.edu/hbase/electronic/diodgate.html#c1" - the very first circuit shows a diode-resistor AND gate. How does that work? I understand the OR gate shown right below it, but... the two inputs on this AND gate are connected to reversed...
I am learning about the implementations of digital logic gates using n-type and p-type transistors.
With the advent of these two transistors, isn't it possible to have more than one implementation of the NAND gate?
The AND gate
1. When A = 0 and B = 0 both diode D1 and D2 get forward biased and hence conduct. The diodes being ideal, no voltage drop takes place across either diode. Therefore potential difference of 5V takes place across R, with C at zero potential with respect to earth. Thus the...
Hi all,
Trying to design a simple gate for the side of our house and in order to select the size of the square tube for the frame, I need to calculate the forces in the members of the frame.
I have tried the method of sections and joints, however both do not seem to work.
My next...
What is the difference between "Bias" voltage and "Gate" voltage?
Well, as the title may indicate, I am wondering what the difference between a "bias" voltage and a "gate" voltage is. I'm looking at some nanoscale systems, and sometimes researchers say they apply a "bias" voltage to a certain...