Signal Generator assignment, Multisim results confuse me

[Kami_Munchkins]

TL;DR Summary: Hi, i'm trying to talk about the results, this is a research assignment so i have no support

Hello, so here is the circuit. Its a basic signal generator, My issue is in the practical version, the potentiometer effected frequency, but in the simulation this is not the case... I also don't understand why the output voltage for each percentage is going up and down. I assumed since voltage is constant, as the resistance is increased the output should decrease. I can't find any recources either because i don't know what i'm looking for. The table of my results are here too, any help is appreciated.

 

[Baluncore]

Welcome to PF.

R1 and R2 make U1A a positive feedback Schmitt trigger, so the first op-amp is being used as a voltage comparator with fixed high and low thresholds.

The rate that the C1 voltage changes as it moves between the high and low thresholds is dependent on the value of R3.

Check the simulation terminals you have used on R3. It seems you have a fixed resistance.

If that works in the simulation, but not in a practical circuit, then you have made a wrong connection somewhere. How have you built the circuit?

Is this homework?

 

[DaveE]

Try this:

 

[DaveE]

I also don't understand why the output voltage for each percentage is going up and down. I assumed since voltage is constant, as the resistance is increased the output should decrease.

Umm... What?

As the resistance is increased the frequency out of the first stage should decrease, but it's voltage should stay the same. The next stage is a low pass filter, so higher frequencies are attenuated compared to lower frequencies.

 

[TonyStewart]

@DaveE pointed out your connection flaw, missing the connecting of the tap to one end.

Theory of Operation.

Understand that all Operational Amplifiers have huge voltage gain until the output saturates near the "supply rail" then the gain goes to zero. ( i.e. any small input change has no effect on output as linear Op Amps use external negative feedback to create a null input differential error, except for input offsets).

The 1st stage here uses RC Negative Feedback (NFB) as a low pass filter (LPF), but here also uses almost 20% Positive Feedback 22/(22+100) which causes this output saturation that cannot be corrected immediately by NFB due to slow LPF feedback.

This non-linear operation is called (quasi-stable or) an Astable Oscillator (aka Relaxation Oscillator) The input capacitor to ground creates the time delay to traverse from output binary 1 to 0 to 1 ... The transition occurs when the inputs match due to the amount of Hysteresis or % ratio of positive feedback. (aka Schmitt trigger) The smaller positive FB ratio also increases the frequency, is another way to do this variable frequency square wave "sig. gen.", until you get down to input noise levels.

triva: you only need 2 of the 3 pot connections, and often they are numbers in schematics 1,2,3 and clockwise motion of centre is from one to three (1 "2" 3 CW) which here increases frequency, so you would use pins 2 & 3. ( or short 1&2) to increase f with CW motion or UP or Right motion in a linear slider.

 

[Kami_Munchkins]

Umm... What?

As the resistance is increased the frequency out of the first stage should decrease, but it's voltage should stay the same. The next stage is a low pass filter, so higher frequencies are attenuated compared to lower frequencies.

so the oscilloscope reading... if you leave it running the sin wave translates down and doesn't stop, while the triangle translates up and doesn't stop. Square stays the same... i really don't understand and nothing is making sense to me especially since the simulation frequency is not changing with the potentiometer

 

[Kami_Munchkins]

Welcome to PF.

R1 and R2 make U1A a positive feedback Schmitt trigger, so the first op-amp is being used as a voltage comparator with fixed high and low thresholds.

The rate that the C1 voltage changes as it moves between the high and low thresholds is dependent on the value of R3.

Check the simulation terminals you have used on R3. It seems you have a fixed resistance.

If that works in the simulation, but not in a practical circuit, then you have made a wrong connection somewhere. How have you built the circuit?

Is this homework?

so in the practical circuit, it was set up exactly the same just on a breadboard. the potentiometer effected the output frequency of each wave, but this result doesn't happen in the multisim? Also whats a Schmitt trigger? we haven't covered this. Also i am not sure if i can change the simulation because i was told to make it that way
As for homework, no its a research assignment for my university module, Signals and Signal Processing... but the classes were just about basic theory and not really covered why or how this works so i'm really stuck... my background is pure maths, so all this physics i don't even know where to start and i got desperate so i made a post here

 

[TonyStewart]

I hope you tried to understand my Theory of Operation. Please learn to state what you understand with a question so we can see where the correction is needed.

Here I will show 3 different types of "Astable Oscillators all using the same RC=T values but slightly different frequencies. These are all reliable methods with advantages and disadvantages. since your circuit is the 3rd, I put it's CMOS Logic equivalent which have a nominal 1/3 to 2/3 Vdd hysteresis thresholds from internal positive feedback ratios like your 22k/(100k+22k) = 18% of ideal output swings (Vcc-Vee).

Starting from the right, the +ve input toggles back and forth a ratio of the output, while the -ve input ramps towards that inverted threshold then flips when the inputs are equal. The 2nd circuit using CMOS Schmitt Inverter does the same except the ratios are internal between Vdd and Vss. The transition always occurs when the inputs are equal.

Now my 1st osc. differentiates the output but still has positive feedback for AC using two standard CMOS inverters. The Schottky diode pair can be left out if its input resistor limits the input switched current < 0.1 mA from over-voltage as the internal ESD clamp diodes will protect the device. So the 1st left resistor is just an arbitrary current limiter value then RC which differentiates the output instead of integrating it. In this case the threshold to reach is nom. 50% of Vdd on the left-most input.As always in Falstad browser simulation, you can stop the simulation or speed it up, while a mouse thumbwheel can change any RLC value (or manual edit) so you can see how the time constant changes with RC=T towards the target threshold changes the "half-cycle time" of the repetition rate or frequency which is included in my plots. You can use the mouse wheel like a "pot" or select part > Slider> value= min, max. Each plots will show the max voltage on display by default, then I added more info > properties> >show info> .

Notice that the Op Amp needs a bipolar supply for a ground reference on Vin+_. To use a single supply, you would need an equal pull-up (Vdd) an pull-down (0v) to set the midpoint equal to the average output in order to get exactly 50% duty cycle.

If you consider the voltage drop across the resistor V=IR and the same current in the capacitor Ic=CdV/dt you get the exponential decay towards the driving voltage, which for low hysteresis looks is a fairly linear triangle. Then integration of the triangle with a LPF attenuates the odd harmonics again towards a fairly clean sine wave with harmonics not visible on a linear scale but quite visible on a dB scale such as a spectrum analyzer.Simulation

 

[Baluncore]

but this result doesn't happen in the multisim?

That is because you have connected to the wrong terminals of the R3 potentiometer.
Do NOT connect to the two ends, because that is a fixed 100k resistance.
Connect to one end, and to the variable wiper terminal.

 

[Kami_Munchkins]

That is because you have connected to the wrong terminals of the R3 potentiometer.
Do NOT connect to the two ends, because that is a fixed 100k resistance.
Connect to one end, and to the variable wiper terminal.

I see... i was told to connect it that way, so i was hesitant to change it

 

[DaveE]

An alternative is to wire it as a fixed resistor and change it's value in the simulation with commands like .param & .step (or equivalent).

 

[Kami_Munchkins]

Thank-you everyone for your help! I've wrote down all the topics you mentioned and i'm looking forward to some self study to learn it all!

 

[TonyStewart]

Thank-you everyone for your help! I've wrote down all the topics you mentioned and i'm looking forward to some self study to learn it all!

Did you try to understand the waveforms I plotted? these are basic elements of hysteresis and feedback for self-biasing DC and AC conversion.

 

[Kami_Munchkins]

Did you try to understand the waveforms I plotted? these are basic elements of hysteresis and feedback for self-biasing DC and AC conversion.

I have been trying to learn everything everyone mentioned since i'm on holiday at the moment :D Its all been very interesting for me, but kind of nerve wracking since I have a major mechatronics project next year, so trying to fully understand electronics and programming along with mechanical maths has been very daunting But this has really helped a lot, i feel like i understand wave forms a bit better now, so thank-you truly :D